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Results:
1-15
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Results: 15
Authors:
Haase, J
Citation: J. Haase, Virtual components - From research to business, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 1-11
Authors:
Borel, J
Sauer, A
Seepold, R
Citation: J. Borel et al., Evaluation of technology and the MEDEA Design Automation Roadmap, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 13-32
Authors:
Martin, G
Citation: G. Martin, Productivity in VC reuse: Linking SOC platforms to abstract systems designmethodology, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 33-46
Authors:
Boke, C
Ditze, C
Eickerling, HJ
Glasser, U
Kleinjohann, B
Rammig, F
Thronicke, W
Citation: C. Boke et al., Software IP in embedded systems, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 47-64
Authors:
Torroja, Y
Machado, F
Casado, F
de la Torre, E
Riesgo, T
Uceda, J
Citation: Y. Torroja et al., ARDID: A tool and a model for the quality analysis of VHDL based designs, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 65-80
Authors:
Costi, C
Miller, DM
Citation: C. Costi et Dm. Miller, A VHDL analysis environment for design reuse, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 81-94
Authors:
Fornaciari, W
Minonne, S
Salice, F
Vincenzi, M
Citation: W. Fornaciari et al., Lambda-block analysis of VHDL for design reuse, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 95-103
Authors:
Koegst, M
Schneider, J
Bergmann, R
Vollrath, I
Citation: M. Koegst et al., IP retrieval by solving constraint satisfaction problems, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 105-118
Authors:
Schubert, A
Jahrig, R
Anheier, W
Citation: A. Schubert et al., Cryptographic reuse library, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 119-130
Authors:
Hansen, C
Bringmann, O
Rosenstiel, W
Citation: C. Hansen et al., A VHDL reuse component model for mixed abstraction level simulation and behavioral synthesis, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 131-144
Authors:
Hashmi, MMK
Citation: Mmk. Hashmi, Virtual component interfaces, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 145-157
Authors:
Siegmund, R
Muller, D
Citation: R. Siegmund et D. Muller, A method for interface customization of soft IP cores, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 159-170
Authors:
Pulka, A
Citation: A. Pulka, Modeling assistant - A flexible VCM generator in VHDL, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 171-182
Authors:
Olcoz, S
Gutierrez, A
Navarro, D
Citation: S. Olcoz et al., Reusing IPs to implement a SPARC (R) SOC, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 183-193
Authors:
Sarmento, A
Fernandes, J
Barros, E
Citation: A. Sarmento et al., HARDWWWIRED: Using the Web as repository of VHDL components, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 195-205
Risultati:
1-15
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