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Results: 1-3 |
Results: 3
EFFECTS OF SEGREGATED GE ON ELECTRICAL-PROPERTIES OF SIO2 SIGE INTERFACE/
Authors: AHN CG KANG HS KWON YK KANG B
Citation: Cg. Ahn et al., EFFECTS OF SEGREGATED GE ON ELECTRICAL-PROPERTIES OF SIO2 SIGE INTERFACE/, JPN J A P 1, 37(3B), 1998, pp. 1316-1319
METHOD FOR MEASURING DEEP LEVELS IN THIN SILICON-ON-INSULATOR LAYER WITHOUT ANY INTERFACE EFFECTS
Authors: KANG HS AHN CG KANG BK KWON YK
Citation: Hs. Kang et al., METHOD FOR MEASURING DEEP LEVELS IN THIN SILICON-ON-INSULATOR LAYER WITHOUT ANY INTERFACE EFFECTS, Journal of the Electrochemical Society, 145(10), 1998, pp. 3581-3585
LOW-TEMPERATURE (LESS-THAN-OR-EQUAL-TO-550-DEGREES-C) FABRICATION OF CMOS TFT ON RAPID-THERMAL CVD POLYCRYSTALLINE SILICON-GERMANIUM FILMS
Authors: LEE SK CHOE SM AHN CG CHUNG WJ KWON YK KANG BK KIM O
Citation: Sk. Lee et al., LOW-TEMPERATURE (LESS-THAN-OR-EQUAL-TO-550-DEGREES-C) FABRICATION OF CMOS TFT ON RAPID-THERMAL CVD POLYCRYSTALLINE SILICON-GERMANIUM FILMS, JPN J A P 1, 36(3B), 1997, pp. 1389-1393
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