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Results:
1-8
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Results: 8
Authors:
AMERASEKERA A
CHANG MC
DUVVURY C
RAMASWAMY S
Citation: A. Amerasekera et al., MODELING MOS SNAPBACK AND PARASITIC BIPOLAR ACTION FOR CIRCUIT-LEVEL ESD AND HIGH-CURRENT SIMULATIONS, IEEE circuits and devices magazine, 13(2), 1997, pp. 7-10
Authors:
BANERJEE K
AMERASEKERA A
CHEUNG N
HU CM
Citation: K. Banerjee et al., HIGH-CURRENT FAILURE MODEL FOR VLSI INTERCONNECTS UNDER SHORT-PULSE STRESS CONDITIONS, IEEE electron device letters, 18(9), 1997, pp. 405-407
Authors:
DUVVURY C
AMERASEKERA A
Citation: C. Duvvury et A. Amerasekera, ESD ISSUES FOR ADVANCED CMOS TECHNOLOGIES, Microelectronics and reliability, 36(7-8), 1996, pp. 907-924
Authors:
AMERASEKERA A
DUVVURY C
Citation: A. Amerasekera et C. Duvvury, THE IMPACT OF TECHNOLOGY SCALING ON ESD ROBUSTNESS AND PROTECTION CIRCUIT-DESIGN, IEEE transactions on components, packaging, and manufacturing technology. Part A, 18(2), 1995, pp. 314-320
Authors:
AMERASEKERA A
CHAPMAN RA
Citation: A. Amerasekera et Ra. Chapman, TECHNOLOGY DESIGN FOR HIGH-CURRENT AND ESD ROBUSTNESS IN A DEEP-SUBMICRON CMOS PROCESS, IEEE electron device letters, 15(10), 1994, pp. 383-385
Authors:
AMERASEKERA A
CHATTERJEE A
Citation: A. Amerasekera et A. Chatterjee, AN INVESTIGATION OF BICMOS ESD PROTECTION CIRCUIT ELEMENTS AND APPLICATIONS IN SUBMICRON TECHNOLOGIES, Journal of electrostatics, 31(2-3), 1993, pp. 145-160
Authors:
AMERASEKERA A
CHANG MC
SEITCHIK JA
CHATTERJEE A
MAYARAM K
CHERN JH
Citation: A. Amerasekera et al., SELF-HEATING EFFECTS IN BASIC SEMICONDUCTOR STRUCTURES, I.E.E.E. transactions on electron devices, 40(10), 1993, pp. 1836-1844
Authors:
DUVVURY C
AMERASEKERA A
Citation: C. Duvvury et A. Amerasekera, ESD - A PERVASIVE RELIABILITY CONCERN FOR IC TECHNOLOGIES, Proceedings of the IEEE, 81(5), 1993, pp. 690-702
Risultati:
1-8
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