AAAAAA

   
Results: 1-8 |
Results: 8
SEU SENSITIVE DEPTH IN A SUBMICRON SRAM TECHNOLOGY
Authors: DETCHEVERRY C ECOFFET R DUZELLIER S LORFEVRE E BRUGUIER G BARAK J LIFSHITZ Y PALAU JM GASIOT J
Citation: C. Detcheverry et al., SEU SENSITIVE DEPTH IN A SUBMICRON SRAM TECHNOLOGY, IEEE transactions on nuclear science, 45(3), 1998, pp. 1612-1616
SEU CRITICAL CHARGE AND SENSITIVE AREA IN A SUBMICRON CMOS TECHNOLOGY
Authors: DETCHEVERRY C DACHS C LORFEVRE E SUDRE C BRUGUIER G PALAU JM GASIOT J ECOFFET R
Citation: C. Detcheverry et al., SEU CRITICAL CHARGE AND SENSITIVE AREA IN A SUBMICRON CMOS TECHNOLOGY, IEEE transactions on nuclear science, 44(6), 1997, pp. 2266-2273
A STUDY INVOLVING THE DESIGN AND THE FABRICATION PROCESS ON THE SRAM BEHAVIOR DURING A DOSE-RATE EVENT
Authors: MAREC R MARY P GAILLARD R PALAU JM BRUGUIER G GASIOT J
Citation: R. Marec et al., A STUDY INVOLVING THE DESIGN AND THE FABRICATION PROCESS ON THE SRAM BEHAVIOR DURING A DOSE-RATE EVENT, IEEE transactions on nuclear science, 43(3), 1996, pp. 851-857
SINGLE PARTICLE-INDUCED LATCHUP
Authors: BRUGUIER G PALAU JM
Citation: G. Bruguier et Jm. Palau, SINGLE PARTICLE-INDUCED LATCHUP, IEEE transactions on nuclear science, 43(2), 1996, pp. 522-532
SIMULATION AIDED HARDENING OF N-CHANNEL POWER MOSFETS TO PREVENT SINGLE EVENT BURNOUT
Authors: DACHS C ROUBAUD F PALAU JM BRUGUIER G GASIOT J TASTET P CALVET MC CALVEL P
Citation: C. Dachs et al., SIMULATION AIDED HARDENING OF N-CHANNEL POWER MOSFETS TO PREVENT SINGLE EVENT BURNOUT, IEEE transactions on nuclear science, 42(6), 1995, pp. 1935-1939
EVIDENCE OF THE IONS IMPACT POSITION EFFECT ON SEB IN N-CHANNEL POWERMOSFETS
Authors: DACHS C ROUBAUD F PALAU JM BRUGUIER G GASIOT J TASTET P
Citation: C. Dachs et al., EVIDENCE OF THE IONS IMPACT POSITION EFFECT ON SEB IN N-CHANNEL POWERMOSFETS, IEEE transactions on nuclear science, 41(6), 1994, pp. 2167-2171
THE EFFECT OF LAYOUT MODIFICATION ON LATCHUP TRIGGERING IN CMOS BY EXPERIMENTAL AND SIMULATION APPROACHES
Authors: DELAROCHETTE H BRUGUIER G PALAU JM GASIOT J ECOFFET R
Citation: H. Delarochette et al., THE EFFECT OF LAYOUT MODIFICATION ON LATCHUP TRIGGERING IN CMOS BY EXPERIMENTAL AND SIMULATION APPROACHES, IEEE transactions on nuclear science, 41(6), 1994, pp. 2222-2228
THE LATCHUP RISK OF CMOS-TECHNOLOGY IN SPACE
Authors: MOREAU Y DELAROCHETTE H BRUGUIER G GASIOT J PELANCHON F SUDRE C ECOFFET R
Citation: Y. Moreau et al., THE LATCHUP RISK OF CMOS-TECHNOLOGY IN SPACE, IEEE transactions on nuclear science, 40(6), 1993, pp. 1831-1837
Risultati: 1-8 |