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Results:
1-7
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Results: 7
Potential showstoppers in technology and EDA roadmaps
Authors:
Borel, J
Citation:
J. Borel, Potential showstoppers in technology and EDA roadmaps, IEEE DES T, 18(6), 2001, pp. 9-10
Soft errors at ground level
Authors:
Borel, J
Citation:
J. Borel, Soft errors at ground level, IEEE DES T, 18(6), 2001, pp. 66-67
Evaluation of technology and the MEDEA Design Automation Roadmap
Authors:
Borel, J Sauer, A Seepold, R
Citation:
J. Borel et al., Evaluation of technology and the MEDEA Design Automation Roadmap, VIRTUAL COMPONENTS DESIGN AND REUSE, 2001, pp. 13-32
System on a chip (SoC) and design methodology challenges
Authors:
Borel, J
Citation:
J. Borel, System on a chip (SoC) and design methodology challenges, MICROEL ENG, 54(1-2), 2000, pp. 15-22
Design automation in Europe
Authors:
Borel, J Ghenassia, F Rosenstiel, W Perea, E Sauer, A Jerraya, A
Citation:
J. Borel et al., Design automation in Europe, IEEE DES T, 16(4), 1999, pp. 90-95
Design automation in media: Present and future
Authors:
Borel, J
Citation:
J. Borel, Design automation in media: Present and future, IEEE MICRO, 19(5), 1999, pp. 71-79
An odontogenic mandibular tumor
Authors:
Bouchet, F Reynaud, P Borel, J Baudet-Pommel, M Dechelotte, P
Citation:
F. Bouchet et al., An odontogenic mandibular tumor, ANN PATHOL, 19(2), 1999, pp. 145-146
Risultati:
1-7
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