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High-level power estimation methodology applied for processor-level DTSE
Authors:
Lippens, P Busa, N Huisken, J Llopis, RP
Citation:
P. Lippens et al., High-level power estimation methodology applied for processor-level DTSE, UNIFIED LOW-POWER DESIGN FLOW FOR DATA-DOMINATED MULTI-MEDIA AND TELECOM APPLICATIONS, 2000, pp. 65-96
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