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Results: 1-7 |
Results: 7
Handling soft modules in general nonslicing floorplan using Lagrangian relaxation
Authors: Young, FY Chu, CCN Luk, WS Wong, YC
Citation: Fy. Young et al., Handling soft modules in general nonslicing floorplan using Lagrangian relaxation, IEEE COMP A, 20(5), 2001, pp. 687-692
Generation of universal series-parallel Boolean functions
Authors: Young, FY Chu, CCN Wong, DF
Citation: Fy. Young et al., Generation of universal series-parallel Boolean functions, J ACM, 46(3), 1999, pp. 416-435
An efficient and optimal algorithm for simultaneous buffer and wire sizing
Authors: Chu, CCN Wong, DF
Citation: Ccn. Chu et Df. Wong, An efficient and optimal algorithm for simultaneous buffer and wire sizing, IEEE COMP A, 18(9), 1999, pp. 1297-1304
Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation
Authors: Chen, CP Chu, CCN Wong, DF
Citation: Cp. Chen et al., Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation, IEEE COMP A, 18(7), 1999, pp. 1014-1025
A quadratic programming approach to simultaneous buffer insertion sizing and wire sizing
Authors: Chu, CCN Wong, DF
Citation: Ccn. Chu et Df. Wong, A quadratic programming approach to simultaneous buffer insertion sizing and wire sizing, IEEE COMP A, 18(6), 1999, pp. 787-798
Greedy wire-sizing is linear time
Authors: Chu, CCN Wong, MDF
Citation: Ccn. Chu et Mdf. Wong, Greedy wire-sizing is linear time, IEEE COMP A, 18(4), 1999, pp. 398-405
A matrix synthesis approach to thermal placement
Authors: Chu, CCN Wong, DF
Citation: Ccn. Chu et Df. Wong, A matrix synthesis approach to thermal placement, IEEE COMP A, 17(11), 1998, pp. 1166-1174
Risultati: 1-7 |