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Results:
1-5
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Results: 5
VLSI DESIGN IN THE 3RD-DIMENSION
Authors:
STRICKLAND S ERGIN E KAELI DR ZAVRACKY P
Citation:
S. Strickland et al., VLSI DESIGN IN THE 3RD-DIMENSION, Integration, 25(1), 1998, pp. 1-16
EFFICIENT PROCEDURE MAPPING USING CACHE LINE COLORING
Authors:
HASHEMI AH KAELI DR CALDER B
Citation:
Ah. Hashemi et al., EFFICIENT PROCEDURE MAPPING USING CACHE LINE COLORING, ACM SIGPLAN NOTICES, 32(5), 1997, pp. 171-182
CREATING 3D CIRCUITS USING TRANSFERRED FILMS
Authors:
SAILER PM SINGHAL P HOPWOOD J KAELI DR ZAVRACKY PM WARNER K VU DP
Citation:
Pm. Sailer et al., CREATING 3D CIRCUITS USING TRANSFERRED FILMS, IEEE circuits and devices magazine, 13(6), 1997, pp. 27-30
IMPROVING THE ACCURACY OF HISTORY-BASED BRANCH PREDICTION
Authors:
KAELI DR EMMA PG
Citation:
Dr. Kaeli et Pg. Emma, IMPROVING THE ACCURACY OF HISTORY-BASED BRANCH PREDICTION, I.E.E.E. transactions on computers, 46(4), 1997, pp. 469-472
PERFORMANCE ANALYSIS ON A CC-NUMA PROTOTYPE
Authors:
KAELI DR FONG LL BOOTH RC IMMING KC WEIGEL JP
Citation:
Dr. Kaeli et al., PERFORMANCE ANALYSIS ON A CC-NUMA PROTOTYPE, IBM journal of research and development, 41(3), 1997, pp. 205-214
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