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Results:
1-7
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Results: 7
Authors:
TIAN ZY
LIN TTY
YANG SY
TONG SB
Citation: Zy. Tian et al., THE FAULTY BEHAVIOR OF FEEDFORWARD NEURAL NETWORKS WITH HARD-LIMITINGACTIVATION FUNCTION, Neural computation, 9(5), 1997, pp. 1109-1126
Authors:
TIAN ZY
LIU PCK
LIN TTY
YANG SY
Citation: Zy. Tian et al., ANALYZING THE ERROR OF AN APPROXIMATE METHOD FOR COMPUTING PERFORMANCE-RELATED RELIABILITY, Microelectronics and reliability, 36(5), 1996, pp. 675-678
Authors:
LILLIS J
CHENG CK
LIN TTY
Citation: J. Lillis et al., OPTIMAL WIRE SIZING AND BUFFER INSERTION FOR LOW-POWER AND A GENERALIZED DELAY MODEL, IEEE journal of solid-state circuits, 31(3), 1996, pp. 437-447
Authors:
YEH CW
CHENG CK
LIN TTY
Citation: Cw. Yeh et al., OPTIMIZATION BY ITERATIVE IMPROVEMENT - AN EXPERIMENTAL EVALUATION ON2-WAY PARTITIONING, IEEE transactions on computer-aided design of integrated circuits and systems, 14(2), 1995, pp. 145-153
Authors:
YEH CW
CHENG CK
LIN TTY
Citation: Cw. Yeh et al., CIRCUIT CLUSTERING USING A STOCHASTIC FLOW-INJECTION METHOD, IEEE transactions on computer-aided design of integrated circuits and systems, 14(2), 1995, pp. 154-162
Authors:
YEH CW
CHENG CK
LIN TTY
Citation: Cw. Yeh et al., A GENERAL-PURPOSE, MULTIPLE-WAY PARTITIONING ALGORITHM, IEEE transactions on computer-aided design of integrated circuits and systems, 13(12), 1994, pp. 1480-1488
Authors:
LIN TTY
LIOU HY
Citation: Tty. Lin et Hy. Liou, A NEW FRAMEWORK FOR DESIGNING BUILT-IN-TEST MULTICHIP MODULES WITH PIPELINED TEST STRATEGY, IEEE design & test of computers, 10(4), 1993, pp. 38-51
Risultati:
1-7
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