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Results: 1-2 |
Results: 2
An FPGA systolic array using pseudo-random bit generators for computing Goldbach partitions
Authors: Lavenier, D
Citation: D. Lavenier, An FPGA systolic array using pseudo-random bit generators for computing Goldbach partitions, INTEGRATION, 30(1), 2000, pp. 77-89
Advanced systolic design
Authors: Lavenier, D Quinton, P Rajopadhye, S
Citation: D. Lavenier et al., Advanced systolic design, SIGNAL PR S, 1999, pp. 657-692
Risultati: 1-2 |