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Results:
1-7
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Results: 7
Authors:
Suyama, T
Yokoo, M
Sawada, H
Nagoya, A
Citation: T. Suyama et al., Solving satisfiability problems using reconfigurable computing, IEEE VLSI, 9(1), 2001, pp. 109-116
Authors:
Yamashita, S
Sawada, H
Nagoya, A
Citation: S. Yamashita et al., A general framework to use various decomposition methods for LUT network synthesis, IEICE T FUN, E84A(11), 2001, pp. 2915-2922
Authors:
Nagano, H
Matsuura, A
Nagoya, A
Citation: H. Nagano et al., An efficient implementation method of a metric computation accelerator forfractal image compression using reconfigurable hardware, IEICE T FUN, E84A(1), 2001, pp. 372-377
Authors:
Sawada, H
Yamashita, S
Nagoya, A
Citation: H. Sawada et al., Efficient kernel generation based on implicit cube set representations andits applications, IEICE T FUN, E83A(12), 2000, pp. 2513-2519
Authors:
Yamashita, S
Sawada, H
Nagoya, A
Citation: S. Yamashita et al., SPFD: A new method to express functional flexibility, IEEE COMP A, 19(8), 2000, pp. 840-849
Authors:
Yamashita, S
Sawada, H
Nagoya, A
Citation: S. Yamashita et al., An efficient method for finding an optimal bi-decomposition, IEICE T FUN, E81A(12), 1998, pp. 2529-2537
Authors:
Sawada, H
Yamashita, S
Nagoya, A
Citation: H. Sawada et al., Restructuring logic representations with simple disjunctive decompositions, IEICE T FUN, E81A(12), 1998, pp. 2538-2544
Risultati:
1-7
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