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Results: 1-7 |
Results: 7
3D acoustic image localization algorithm by embedded DSP
Authors: Kobayashi, W Sakamoto, N Onoye, T Shirakawa, I
Citation: W. Kobayashi et al., 3D acoustic image localization algorithm by embedded DSP, IEICE T FUN, E84A(6), 2001, pp. 1423-1430
LUT-array-based PLD and synthesis approach based on sum of generalized complex terms expression
Authors: Tsutsui, H Tomita, A Sugimoto, S Sakai, K Izumi, T Onoye, T Nakamura, Y
Citation: H. Tsutsui et al., LUT-array-based PLD and synthesis approach based on sum of generalized complex terms expression, IEICE T FUN, E84A(11), 2001, pp. 2681-2689
Low-power implementation of H.263 codec core dedicated to mobile computing
Authors: Miki, MH Fujita, G Onoye, T Shirakawa, I
Citation: Mh. Miki et al., Low-power implementation of H.263 codec core dedicated to mobile computing, ELEC C JP 3, 83(11), 2000, pp. 74-84
VLSI architecture of switching control for AAL type2 switch
Authors: Hatanaka, M Masaki, T Onoye, T Murakami, K
Citation: M. Hatanaka et al., VLSI architecture of switching control for AAL type2 switch, IEICE T FUN, E83A(3), 2000, pp. 435-441
Automatic moving object extraction toward compact video representation
Authors: Fan, JP Fujita, G Furuie, M Onoye, T Shirakawa, T Wu, LD
Citation: Jp. Fan et al., Automatic moving object extraction toward compact video representation, OPT ENG, 39(2), 2000, pp. 438-452
An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics
Authors: Fujishima, H Takemoto, Y Onoye, T Shirakawa, I
Citation: H. Fujishima et al., An architecture of a matrix-vector multiplier dedicated to video decoding and three-dimensional computer graphics, IEEE CIR SV, 9(2), 1999, pp. 306-314
Low-power scheme of NMOS 4-phase dynamic logic
Authors: Song, BY Furuie, M Yoshida, Y Onoye, T Shirakawa, I
Citation: By. Song et al., Low-power scheme of NMOS 4-phase dynamic logic, IEICE TR EL, E82C(9), 1999, pp. 1772-1776
Risultati: 1-7 |