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INCORPORATING INTERCONNECT, REGISTER, AND CLOCK DISTRIBUTION DELAYS INTO THE RETIMING PROCESS
Authors:
SOYATA T FRIEDMAN EG MULLIGAN JH
Citation:
T. Soyata et al., INCORPORATING INTERCONNECT, REGISTER, AND CLOCK DISTRIBUTION DELAYS INTO THE RETIMING PROCESS, IEEE transactions on computer-aided design of integrated circuits and systems, 16(1), 1997, pp. 105-120
Risultati:
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