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Results: 1-4 |
Results: 4

Authors: Kunimatsu, A Ide, N Sato, T Endo, Y Murakami, H Kamei, T Hirano, M Ishihara, F Tago, H Oka, M Ohba, A Yutaka, T Okada, T Suzuoki, M
Citation: A. Kunimatsu et al., Vector unit architecture for emotion synthesis, IEEE MICRO, 20(2), 2000, pp. 40-47

Authors: Ide, N Hirano, M Endo, Y Yoshioka, S Murakami, H Kunimatsu, A Sato, T Kamei, T Okada, T Suzuoki, M
Citation: N. Ide et al., 2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3-D graphics computing, IEEE J SOLI, 35(7), 2000, pp. 1025-1033

Authors: Oka, M Suzuoki, M
Citation: M. Oka et M. Suzuoki, Designing and programming the emotion engine, IEEE MICRO, 19(6), 1999, pp. 20-28

Authors: Suzuoki, M Kutaragi, K Hiroi, T Magoshi, K Okamoto, S Oka, M Ohba, A Yanamoto, Y Furuhashi, M Tanaka, M Yutaka, T Okada, T Nagamatsu, M Urakawa, Y Funyu, M Kunimatsu, A Goto, H Hashimoto, K Ide, N Murakami, H Ohtaguro, Y Aono, A
Citation: M. Suzuoki et al., A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder, IEEE J SOLI, 34(11), 1999, pp. 1608-1618
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