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Results:
1-7
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Results: 7
Authors:
Juan, EYT
Tsai, JJP
Murata, T
Zhou, Y
Citation: Eyt. Juan et al., Reduction methods for real-time systems using delay time petri nets, IEEE SOFT E, 27(5), 2001, pp. 422-448
Authors:
Tsai, JJP
Xu, K
Citation: Jjp. Tsai et K. Xu, A comparative study of formal verification techniques for software architecture specifications, ANN SOFTW E, 10, 2000, pp. 207-223
Authors:
Kadamuddi, D
Tsai, JJP
Citation: D. Kadamuddi et Jjp. Tsai, Clustering algorithm for parallelizing software systems in multiprocessorsenvironment, IEEE SOFT E, 26(4), 2000, pp. 340-361
Authors:
Tsai, JJP
Liu, A
Juan, E
Sahay, A
Citation: Jjp. Tsai et al., Knowledge-based software architectures: Acquisition, specification, and verification, IEEE KNOWL, 11(1), 1999, pp. 187-201
Authors:
Tsai, JJP
Citation: Jjp. Tsai, Preface, ANN SOFTW E, 7, 1999, pp. 1-3
Authors:
Tsai, JJP
Xu, KA
Citation: Jjp. Tsai et Ka. Xu, An empirical evaluation of deadlock detection in software architecture specifications, ANN SOFTW E, 7, 1999, pp. 95-126
Authors:
Juan, EYT
Tsai, JJP
Murata, T
Citation: Eyt. Juan et al., Compositional verification of concurrent systems using Petri-net-based condensation rules, ACM T PROGR, 20(5), 1998, pp. 917-979
Risultati:
1-7
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