Citation: S. Hellebrand et al., MIXED-MODE BIST USING EMBEDDED PROCESSORS, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 12(1-2), 1998, pp. 127-138
Citation: Ap. Stroele et Hj. Wunderlich, HARDWARE-OPTIMAL TEST REGISTER INSERTION, IEEE transactions on computer-aided design of integrated circuits and systems, 17(6), 1998, pp. 531-539
Citation: Kt. Cheng et al., SPECIAL ISSUE ON TEST SYNTHESIS - GUEST EDITORIAL, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 11(1), 1997, pp. 7-8