In this paper we propose an efficient memory saving architecture for a
n ATV decoder. In this new architecture, the motion-compensation is pe
rformed in the frequency domain. This makes it possible for anchor fra
mes to be saved as compressed bits, resulting in significant memory sa
vings with the addition of several extra devices in the decoder. The i
ncrease in complexity is small compared to the reduction in memory req
uirements. The simulation results with the new decoder architecture ha
ve shown that the reconstructed image quality is close to that of the
conventional decoder.