ON DESIGNING UNIVERSAL LOGIC BLOCKS AND THEIR APPLICATION TO FPGA DESIGN

We present a general methodology to determine the logic function of a programmable cell. It is based on the concept of universal logic gate (ULG) that is capable of being configured to a given set of functions. The cells studied here can be configured to the desired functionality by applying input permutation, negation, bridging or constant assignm ent, or output negation. One application of this technique is to selec t an appropriate programmable cell structure for FPGA architecture. Th e Actel 2 and the three-input look-up table cells are studied and comp ared to the cell that has been designed using the approach described h ere, Experimental results suggest that the new cell behaves as well as the Actel 2 cell in terms of logic power, but requires substantially less area and wiring overhead.