LOCSTEP - A LOGIC-SIMULATION-BASED TEST-GENERATION PROCEDURE

We present a method to generate test sequences that detect large numbe rs of faults (close to or higher than the number of faults that can be detected by deterministic methods) at a cost which is significantly l ower than any existing test generation procedure, The generated sequen ces can be used alone or as prefixes of deterministic test sequences, To generate the sequences, we study the test sequences generated by se veral deterministic test generation procedures. We show that when dete rministic test sequences are applied, the fault-free circuits go throu gh sequences of state transitions that have distinct characteristics w hich are independent of the specific circuit considered, Test sequence s with the same characteristics are generated in this work by using lo gic simulation only on the fault-free circuit, and by considering seve ral random patterns as candidates for inclusion in the test sequence a t every time unit, By fault simulating these sequences, we find that t he fault coverage achieved is very close to the fault coverage achieve d by deterministic sequences, and sometimes is even higher.