PERFORMANCE ANALYSIS OF MULTISTAGE ATM SWITCH WITH PARTIALLY SHARED BUFFERS UNDER NONUNIFORM TRAFFIC

The system delay and cell loss probability of a multistage shared buff er ATM switch under nonuniform traffic are analyzed. The analysis is m ade as follows. First, the cell arrival rate at the output port of the switch is calculated from the output address selectivity parameter. S econd, the traffic load is sent to a finite-length shared buffer which is allocated at each stage of the switch. Third, the steady-state pro bability of the queue length is derived from a Markov state transition diagram. Finally, the delay and cell loss probability for each shared buffer are added at each stage and the system delay and system cell l oss probability are obtained for the path to each output port. The sys tem delay and cell loss probability for uniform traffic are compared w ith those for nonuniform traffic. In nonuniform traffic, there are man y hot spots at output ports or there is a traffic imbalance. In this c ase, the system delay and cell loss probability are higher at hot spot s which have high traffic intensity compared with other ports. We also show that system delay and cell loss probability are higher at output ports which share buffers with hot spots. We show the influences of h ot spots on the other ports. (C) 1997 Scripta Technica, Inc.