SAPICE - A DESIGN TOOL OF CMOS OPERATIONAL-AMPLIFIERS

Based on a new search strategy using circuit simulation and simulated annealing with local search, a design tool is proposed to automate des ign or tuning process for CMOS operational amplifiers. A special-purpo se circuit simulator and some heuristics are used to accomplish the de sign within reasonable time. For arbitrary circuit topology and specif ications, the discrete optimization of cost function is performed by g lobal and local search. Through the comparision of design results and the design of a low-power high-speed CMOS operational amplifier usable in 10-b 25-MHz pipelined A/D converters, it has been demonstrated tha t this tool can be used for designing high-performance operational amp lifiers with less design knowledge and effort.