Ferroelectric nonvolatile memories are especially attractive because o
f their low-voltage, high-speed write. Although these memories use mul
ticomponent metal oxide ferroelectrics and oxygen-tolerant electrode m
aterials that are nonstandard in Si CMOS processing, the deposition an
d etch techniques are related to conventional processes. Integration o
f ferroelectric capacitors into a CMOS process flow introduces several
challenges, including process damage to the ferroelectric capacitors
and interface reactions between electrode materials and conventional c
ircuit elements.