WHEN ARE TRANSMISSION-LINE EFFECTS IMPORTANT FOR ON-CHIP INTERCONNECTIONS

Short, medium, and long on-chip interconnections having linewidths of 0.45-52 mu m are analyzed in a five-metal-layer structure. We study ca pacitive coupling for short lines, inductive coupling For medium-lengt h lines, inductance and resistance of the current return path in the p ower buses, and line resistive losses for the global wiring, Design gu idelines and technology changes are proposed to achieve minimum delay and contain crosstalk for local and global wiring, Conditional express ions are given to determine when transmission-line effects are importa nt for accurate delay and crosstalk prediction.