AN INTEGRATED CMOS DISTRIBUTED-AMPLIFIER UTILIZING PACKAGING INDUCTANCE

An integrated CMOS distributed amplifier is presented. The required in ductance needed for the distributed waveguide structure is realized by the parasitic packaging inductance of a plastic surface-mount package , A fully packaged three-stage distributed amplifier fabricated in a 0 .8-mu m CMOS process is presented, The distributed amplifier has a uni ty gain cutoff frequency of 4.7 GHz, a gain of 5 dB, with a gain flatn ess of +/-1.2 dB over the 300-kHz to 3-GHz band, At a frequency of 2 G Hz the amplifier has an input referred third-order intercept point of +15 dBm and an input referred l-dB compression point of +7 dBm, The am plifier consumes 18 mA from a 3.0-V supply, The distributed amplifier is matched to 50 Omega at the input and output and has a maximum input voltage standing-wave ratio (VSWR) of 1.7:1, and a maximum output VSW R of 1.3:1 over the 300 kHz to 3 GHz band, The amplifier has a noise f igure of 5.1 dB at 2 GHz.