Asynchronous Transfer Mode (ATM) has emerged as a leading technique fo
r high speed networks. The ATM is versatile and flexible enough to pro
vide a service capable of integrating a wide spectrum of multimedia tr
affic. These multimedia traffic sources include compressed data, varia
ble bit rate video and voice. ATM networks are designed to take into c
onsideration all such heterogeneous traffic, and traffic with yet unkn
own service requirements. An ATM network consists of end hosts and swi
tches communicating via a set of simple protocols. The main bottleneck
s in today's high speed networks are the switching systems. This is op
posed to the scenario in the mid 80's when the transmission channels w
ere the main bottleneck in the network performance. There are numerous
switch architectures proposed for ATM networks. Performance of these
ATM switches is critical for efficient operation of the network. We he
re simulate different switch architectures. To this effect, we have de
veloped an ATM switch simulator which will aid in comparing alternate
designs. In this paper, we look at salient design features and some im
plementation issues in our simulator. The simulator takes into account
different parameters such as input traffic pattern, topology of the s
witches, location/capacity of queues, scheduling schemes, and priority
schemes. The simulator produces a set of performance metrics at the e
nd of the simulation run. (C) 1997 Elsevier Science B.V.