DIAGNOSIS OF BOARDS FOR REALISTIC INTERCONNECT SHORTS

Original algorithms and tools for generating diagnostic test sets for board interconnect shorts, and assessing their diagnostic resolution a re proposed. The test sets are derived from a representation of realis tic shorts, extracted from the board layout. Diagnostic resolution is statistically evaluated by simulating diagnosis of a sample of realist ic shorts. The overall methodology is based on a new theoretical frame work that accounts for the probabilities of shorts, according to their multiplicity and possible logic behaviour. Results on real board layo uts show that, compared to the traditional schemes, our test sets have higher diagnostic resolution, shorter test vectors, and can be produc ed efficiently.