PHYSICAL DESIGN AND ASSEMBLY PROCESS-DEVELOPMENT OF A MULTICHIP PACKAGE CONTAINING A LIGHT-EMITTING DIODE (LED) ARRAY DIE

This paper presents the physical design concept and process developmen ts to construct a small module containing a chip with an array of mini ature light emitting diodes (LED's) as well as the driver control circ uitry for the LED array,The module is composed of a glass substrate co nsisting of a fanout pattern from the input/output (I/O) bond pads of tile fine pitch solder bumped LED array chip, The fanout I/O pattern o f the glass terminates on a 40 mil pitch ball grid array land pattern, The LED array chip is bonded face down on the glass and underencapsul ated with an optically transparent underfill, All of the driver board circuitry is on a glob top plastic ball grid array (GTPBGA) package wh ose solder balls are reflow attached to the assembled glass substrate and underencapsulated to provide a finished display module, To impleme nt the module concept, fine pitch (i.e., 80 mu m) 90 Pb/10 Sn solder b ump technology, fluxless flip chip bonding, thin optically transparent underencapsulation technology had to be developed, as well as the dev elopment of a multichip 384 I/O 40 mil pitch GTPBGA, The solder balls on the 384 I/O GTPBGA are 30 Pb/70 In, The assembly technology and und erencapsulation technology for the assembly of the glass substrate con taining the LED array chip and the 384 I/O GTPBGA also had to he devel oped.