THE CONTROLLING VALUE BOOLEAN MATCHING

We present here the Controlling Value Boolean Matching based on fault analysis. The problem is to match a Boolean function with don't cares on library cells under arbitrary input permutations and/or input-outpu t phase assignments. Most of the library cells can be represented by t ree structure circuits. The approach presented here is suitable for th ese structures and computes the Boolean matching better than the struc tural matching used in SIS. It can handle library cells with a general topology and reconvergent paths. The benchmark test shows that the Co ntrolling Value Boolean Matching can be as faster as the structural ma tching used in SIS.