M. Katayama et al., DELAY CALCULATION METHOD FOR SRAM-BASED FPGAS, IEICE transactions on fundamentals of electronics, communications and computer science, E80A(10), 1997, pp. 1789-1794
Citations number
10
Categorie Soggetti
Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture","Computer Science Information Systems
We propose a propagation delay model for SRAM-based FPGAs. It is a sim
plified Elmore delay model with a linear fan-out function. Therefore,
the computational complexity is small. In order to ensure calculation
accuracy, the model parameters are extracted from real layout data. Th
e average model error is 4% compared to actual delays. The model is ap
plicable for delay estimation in a router and as a tool for static cal
culation of critical path delay.