A 1.5-W SINGLE-CHIP MPEG-2 MP-AT-ML VIDEO ENCODER WITH LOW-POWER MOTION ESTIMATION AND CLOCKING

A 1.5-W single-chip MPEG-2 MP@ML real-time video encoder large scale i ntegrator (LSI) has been developed, To form an MPEG-2 encoder system, we employ two 16-Mb synchronous DRAM's, a microprocessor unit (MPU), a nd an audio encoder LSI, Owing to a two-step hierarchical search schem e and a novel adaptive search window scheme, the search range of motio n estimation is -48/+47 horizontal and -16/+15.5 vertical, and the pse udo search range, which is the size when the location of the search wi ndow is adaptively shifted, is -96/+95 horizontal and -32/+31.5 vertic al, We have also developed low-power clocking techniques, i.e., demand -clock controller, local-clock controller, and low-power flip-flops, w hich can eliminate waste of power in clocking, We have successfully fa bricated these new designs as a low-power single-chip MPEG-2 encoder L SI, The operating frequency except for a synchronous DRAM interface un it and a video in/out unit is 54 MHz, The supply voltage to the first and second search engines in a motion estimation unit can be successfu lly lowered to 2.5 V and the others are 3.3 V, Into a 12.45 x 12.45 mm (2) chip with 0.35-mu m CMOS and triple-metal layer technology are int egrated 3.1 M transistors.