R. Alini et al., A 200-MSAMPLE S TRELLIS-CODED PRML READ/WRITE CHANNEL WITH ANALOG ADAPTIVE EQUALIZER AND DIGITAL SERVO/, IEEE journal of solid-state circuits, 32(11), 1997, pp. 1824-1838
A fully integrated partial response maximum likelihood (PRML) read/wri
te IC with analog adaptive equalization operates up to 200 MSample/s.
The chip implements both matched spectral null (MSN) trellis and stand
ard PR4 Viterbi detectors in the digital domain as well as digital ser
vo, The device is integrated in a mature 0.7-mu m BiCMOS technology, h
as a die size of 54 mm(2), and dissipates 2 W with MSN code or 1.5 W w
ith PR4 code at 4.5-V supply and 200 MSample/s.