ON THE BALANCE OF VLIW ARCHITECTURES

This paper presents a methodology for designing balanced VLIW architec tures. Since we are interested in the architectural aspects of those p rocessors we have developed a framework to evaluate the relationship a mong the main components of a VLIW machine, Our framework includes the simulator of an actual processor, software tools both to detect the i nstruction level parallelism of application programs and to generate t he parallel object code for each specific machine configuration derive d from our basic model of VLIW architecture, and an interpreter which reproduces the behavior of each member of the VLIW family. By interpre ting the optimized code derived from a suite of benchmark programs, we have determined the best VLIW configuration for each test program. Fr om these experiments we have discovered which relationship among the m achine components should be observed during the specification of a VLI W machine in order to obtain a balanced processor.