COMPLETION-DETECTION TECHNIQUES FOR ASYNCHRONOUS CIRCUITS

Citation
E. Grass et al., COMPLETION-DETECTION TECHNIQUES FOR ASYNCHRONOUS CIRCUITS, IEICE transactions on information and systems, E80D(3), 1997, pp. 344-350
Citations number
12
Categorie Soggetti
Computer Science Information Systems
ISSN journal
09168532
Volume
E80D
Issue
3
Year of publication
1997
Pages
344 - 350
Database
ISI
SICI code
0916-8532(1997)E80D:3<344:CTFAC>2.0.ZU;2-V
Abstract
An overview of known completion-detection methods is given and their a dvantages and drawbacks are briefly discussed. A relatively new class of single-rail completion-detection techniques is considered in more d etail and simulation results based on adder implementations are presen ted. A variant of a single-rail technique, which has the advantage of glitch-suppression and robust operation, is introduced. Simulation res ults are provided, based on a physical layout of the circuit with extr acted parasitics.