In this paper we describe how the processing speed of a radial basis n
eural network can be performed by the use of field programmable gate a
rrays (FPGA), The calculation of the very time-consuming exponential f
unction is taken by an optimized CORDIC-processor. We determine the nu
mber of the necessary FPGAs and do a processing speed comparison betwe
en FPGA and DSP referring to an application in speech recognition.