PARALLEL IMPLEMENTATION OF THE FAST FOURIER-TRANSFORM ON 2 TMS320C25 DIGITAL SIGNAL PROCESSORS

Authors
Citation
Hg. Yeh, PARALLEL IMPLEMENTATION OF THE FAST FOURIER-TRANSFORM ON 2 TMS320C25 DIGITAL SIGNAL PROCESSORS, IEEE transactions on industrial electronics, 41(1), 1994, pp. 132-135
Citations number
NO
Categorie Soggetti
Instument & Instrumentation","Engineering, Eletrical & Electronic
ISSN journal
02780046
Volume
41
Issue
1
Year of publication
1994
Pages
132 - 135
Database
ISI
SICI code
0278-0046(1994)41:1<132:PIOTFF>2.0.ZU;2-I
Abstract
We use two fixed-point TMS320C25 digital signal processors (DSP's) to parallel implement the FFT. The significance of this multiprocessing s ystem is: 1) the number of times block data transfer occurs between th ese two DSP's is minimum, 2) each DSP can independently perform the sa me FFT routine with different data set, and 3) the total computational load is nearly equally distributed to two DSP's. The speed-up of this system over a single sequential processor is close to two.