K. Hiraishi et M. Nakano, ON SYMBOLIC MODEL CHECKING IN PETRI NETS, IEICE transactions on fundamentals of electronics, communications and computer science, E78A(11), 1995, pp. 1479-1486
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Categorie Soggetti
Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture","Computer Science Information Systems
The symbolic model checking algorithm was proposed for the efficient v
erification of sequential circuits. In this paper, we show that this a
lgorithm is applicable to the verification of concurrent systems descr
ibed by finite capacity Petri nets. In this algorithm, specifications
of the system are given in the form of temporal logic formulas, and th
e algorithm checks whether these formulas hold in the state space. All
logical operations are performed on Binary Decision Diagrams, Since t
he algorithm does not enumerating each state, the problem of state spa
ce explosion can be avoided in many cases.