A CMOS circuit is presented that takes an array of analogue input curr
ents and generates an army of binary output voltages in which the outp
ut corresponding to the minimum input current is high and all other ou
tputs are low. This loser-take-all circuit also encodes the minimum cu
rrent as a voltage that is distributed to all elements through a globa
l wire. Because transistors operate in the subthreshold regime, a sing
le compact cell implemented with as few as two transistors per cell di
ssipates power in the microwatt range. A three-cell loser-take-all cir
cuit was fabricated using a MOSIS 2 mu m p-well process, and experimen
tal data are presented.