S. Kajihara et al., COST-EFFECTIVE GENERATION OF MINIMAL TEST SETS FOR STUCK-AT FAULTS INCOMBINATIONAL LOGIC-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(12), 1995, pp. 1496-1504
This paper presents new cost-effective heuristics for the generation o
f minimal test sets, Both dynamic techniques, which are introduced int
o the test generation process, and a static technique, which is applie
d to already generated test sets, are used. The dynamic compaction tec
hniques maximize the number of faults that a new test vector detects o
ut of the yet-undetected Faults as well as out of the already-detected
ones. Thus, they reduce the number of tests and allow tests generated
earlier in the test generation process to be dropped. The static comp
action technique replaces N test vectors by M < M test vectors, withou
t loss of fault coverage, During test generation, we also fmd a lower
hound on test set size. Experimental results demonstrate the effective
ness of the proposed techniques.