SUBTHRESHOLD SLOPE IN POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS AND EFFECT OF THE GATE OXIDE ON THE SUBTHRESHOLD CHARACTERISTICS

A simple expression for the inverse subthreshold slope in polycrystall ine silicon thin-film transistors (TFTs) is derived as a function of t he gate voltage and with parameters the trapping states at the grain b oundaries, the grain size, and the gate oxide. Comparison with the exp erimental results verifies the validity of the derived expression. We show that in polysilicon TFTs, even with high trapping states density and small grain size, excellent subthreshold characteristics can be ob tained by scaling down the SiO2 thickness to 10 nm. Further improvemen t in the subthreshold characteristics can be achieved using as gate ox ide a Si3N4/SiO2 bilayer of thickness 10 nm which has higher dielectri c constant, exhibits good interface properties with polysilicon and se rves as a diffusion barrier to avoid penetration effects of impurities through the oxide. (C) 1995 American Institute of Physics.