FORMALIZATION OF MULTI-PRECISION ARITHMETIC FOR HIGH-LEVEL SYNTHESIS OF DSP ARCHITECTURES

Citation
M. Pauwels et al., FORMALIZATION OF MULTI-PRECISION ARITHMETIC FOR HIGH-LEVEL SYNTHESIS OF DSP ARCHITECTURES, Journal of VLSI signal processing, 11(1-2), 1995, pp. 97-112
Citations number
34
Categorie Soggetti
Computer Sciences, Special Topics","Engineering, Eletrical & Electronic","Computer Science Information Systems
ISSN journal
09225773
Volume
11
Issue
1-2
Year of publication
1995
Pages
97 - 112
Database
ISI
SICI code
0922-5773(1995)11:1-2<97:FOMAFH>2.0.ZU;2-5
Abstract
Multiple precision arithmetic is very useful to optimally trade off ar ea and time when implementing real-time signal processing algorithms o n application specific architectures. A wide range of area-time tradeo ffs is possible in multiple precision, with the degree of multi-precis ion as a parameter. To cope with this complex optimisation problem, th ere is definitely a need for good models and support by synthesis tool s. This paper describes how multiple precision arithmetic has been for malised and implemented in formal software procedures within the CATHE DRAL-2ND high-level synthesis environment, developed at IMEC. The use of multiple precision arithmetic is illustrated by means of a design o f an industrial application.