Md. Shieh et al., FAULT EFFECTS IN ASYNCHRONOUS SEQUENTIAL LOGIC-CIRCUITS, IEE proceedings. Part E. Computers and digital techniques, 140(6), 1993, pp. 327-332
Citations number
14
Categorie Soggetti
Computer Sciences","Computer Science Hardware & Architecture","Computer Science Theory & Methods
The paper demonstrates the effects of single stuck-at faults in Huffma
n-model asynchronous sequential logic circuits (ASLCs). The fault effe
cts include equivalent-state redundant faults, invalid-state redundant
faults and state oscillations. Equivalent-state redundant faults in A
SLCs may be generated by violation of the fundamental mode constraint
noncritical races or delays. On the other hand, invalid-state redundan
t faults are caused either by the existence of invalid states, or by i
mproperly assigning the 'don't-care' terms. State oscillations are gen
erally caused by the presence of critical races. Based on the fault ef
fects, this paper presents a set of rules for synthesising oscillation
-free ASLCs in the presence of faults. As far as synthesising testable
ASLCs is concerned, the race-free UDC state assignment is much better
than STT state assignment.