A 3.3 V 32 MB NAND FLASH MEMORY WITH INCREMENTAL STEP PULSE PROGRAMMING SCHEME

While the performance of flash memory exceeds hard disk drives in almo st every category, the cost of flash memory must come down in order to gain wider acceptance in mass storage applications, This paper descri bes a 3.3 V-only 32 Mb NAND flash memory that achieves not only high p erformance but also low cost with a 94.9 mm(2) die size, improved yiel ds, and a simple process with 0.5 mu m CMOS technology, Die size is re duced by eliminating high voltage operation on the bitlines through a self boosted program inhibit voltage generation scheme, Incremental-st ep-pulse programming results in a 2.3 MB/s program data rate as well a s improved process variation tolerance. Interleaved data paths and a b oosted wordline results in a 25 us burst cycle time and a 24 MB/s read data rate, Maximum operating current is less than 8 mA.