A CIRCUIT TECHNOLOGY FOR A SELF-REFRESH 16MB DRAM WITH LESS-THAN 0.5 MU-A MB DATA-RETENTION CURRENT/

A 16M self-refresh DRAM achieving less than 0.5 mu A per megabyte data retention current has been developed, Several techniques to achieve l ow retention current, including a relaxed junction biasing (RTB) schem e, a plate-floating leakage-monitoring (PFM) system, and a V-BB pub-do wn word-line driver (PDWD) are described, An extension of data-retenti on time by three-fold and the refresh timer period by 30-fold over pre viously reported self-refresh DRAM's has been achieved. This results i n a reduction of the ac refresh-current to less than 0.4 mu A per mega byte. Furthermore, the addition of a gate-received V-BB detector (GRD) reduces de retention current to less than 0.1 mu A per megabyte, This allows a 20-megabyte RAM disk to retain data for 2.5 years when power ed by a single button-shaped 190-mAh lithium battery.