RADIATION-DAMAGE INVESTIGATION FOR THE DESIGN OF A HARDENED FAST BIPOLAR MONOLITHIC CHARGE SENSITIVE PREAMPLIFIER

In order to implement a high-speed, radiation hardened, Charge Sensiti ve Preamplifier (CSP) in the monolithic 2 mu m BiCMOS technology (call ed HF2CMOS), the performance of the available NPN and PNP transistors were measured, before and after neutron irradiation. Furthermore, also monolithic CSPs, realized with the same technology, were irradiated a nd investigated. Results on the neutron irradiation effect on the base spreading resistance (r(bb')) of the CSP input NPN-transistor are pre sented. Design strategies, to reduce the radiation damage effects in t he CSP performance, were studied. Results confirm that the HF2CMOS pro cess is suitable to sustain the radiation environment of the future LH C collider. A design for a new CSP version is proposed. A novel method for measuring (he series noise of the CSP, at large input capacitance s, was need. The method minimized the errors caused by the CSP rise-ti me.