MULTISPLITTING ITERATIVE METHODS ON FIXED-SIZE VLSI ARCHITECTURES

Citation
E. Papadopoulou et Y. Saridakis, MULTISPLITTING ITERATIVE METHODS ON FIXED-SIZE VLSI ARCHITECTURES, Computing systems in engineering, 6(4-5), 1995, pp. 477-484
Citations number
28
Categorie Soggetti
Engineering,"Computer Science Interdisciplinary Applications
ISSN journal
09560521
Volume
6
Issue
4-5
Year of publication
1995
Pages
477 - 484
Database
ISI
SICI code
0956-0521(1995)6:4-5<477:MIMOFV>2.0.ZU;2-L
Abstract
Multisplitting Iterative Methods is a parametrizable family of iterati ve methods capable of solving Large Linear Systems. They are formed by the proper weighted average of classical (or not) iterative schemes. Hence, they present a second level of inherent parallelism while, at t he same time, they take advantage of the parallel hardware to decrease both the computational time and the number of iterations involved in the computation. The increasingly large size of linear systems and the consideration of realistically large, but fixed-size, VLSI architectu res, for their solution, motivated this work. We design new fixed size VLSI modules, based on space-time partitioning techniques, to efficie ntly resolve the problems arising in the computation of an oversized i teration step.