ANALOG VLSI NEUROMORPHIC IMAGE ACQUISITION AND PREPROCESSING SYSTEMS

We consider the problem of automatic object recognition by small, ligh t-weight, low-power, hardware systems. We abstract from biological fun ction and organization and propose hardware architectures and a design methodology to engineer such hardware. Robust, miniature, and energet ically efficient VLSI systems for AOR can ultimately be achieved by fo llowing a path which optimizes the design at and between all levels of system integration, i.e., from devices and circuit techniques all the way to algorithms and architectural level considerations. By way of e xample, we discuss two experimental systems for image acquisition and pre-processing fabricated in standard CMOS processes. The first one is a large scale analog system, a contrast sensitive silicon retina, wit h over 590,000 transistors operating in subthreshold CMOS. The second system is a mixed analog-digital system for image acquisition and trac king compensation that incorporates a contrast sensitive silicon retin a in the image sensing area.