GAAS-FETS GATE CURRENT BEHAVIOR AND ITS EFFECTS ON RF PERFORMANCE ANDRELIABILITY IN SSPAS

This paper presents a detailed experimental investigation of gate curr ent limitation effects on power GaAs FET's rf performances. This limit ation is accomplished entirely by dynamic compensation of the gate bia s voltage. Effects of this current limitation on power added efficienc y and output power performances have been examined through an extensiv e experimental investigation using active second-harmonic loading over the entire Smith chart, Comprehensive results are given and enable th e determination of the optimal gate resistor value needed in the de pa th for gate current limitation, Thermal runaway problem is also consid ered when selecting the gate resistor. The current limitation mechanis m is analyzed in the case where the gate voltage is controlled in a fe edback loop for linearization purposes. Measurements performed on a fe edback linearized amplifier are presented and show the behavior of the gate current and its effects on intermodulation product levels.