CORRELATION OF PICOSECOND LASER-INDUCED LATCHUP AND ENERGETIC PARTICLE-INDUCED LATCHUP IN CMOS TEST STRUCTURES

We show that the thresholds for picosecond (psec) laser pulse-induced latchup and energetic particle-induced latchup are well correlated ove r a range of bulk CMOS test structures designed to be susceptible to l atchup. The spatial length of the latchup-sensitive node of the test s tructures covers a range of values that commonly occur in bulk CMOS de vices. The accuracy of this correlation implies that laser-induced lat chup can be used for hardness assurance and, under the proper conditio ns, can be an accurate predictor of latchup threshold linear energy tr ansfer (LET) for most bulk CMOS devices.