DATA-PATH SYNTHESIS DIGITAL ELECTRONICS .1. MEMORY ALLOCATION

A data path consists of memory elements (i.e., registers), data operat ors (i.e. ALUs) and interconnection units (i.e., buses) to control the data transfers in the digital system Many approaches to hardware allo cation for data path synthesis have been proposed in the literature. H owever, only single-port memory is considered for register allocation and no efficient synthesis approach for multiport memory synthesis, A novel design methodology for data path synthesis using multiport memor ies is proposed which can be applied to hardware allocation algorithms or to already synthesized data path as a postprocessor to achieve a b etter design. Illustrations of applying this method to different synth esis examples are presented. Results and improvements over previous te chniques are demonstrated. Experiments on benchmarks show very promisi ng results. Part II: Bus Synthesis, gives detailed algorithms for the automated allocation of buses in data paths.