OPTIMAL FAULT-DETECTION FOR ANALOG CIRCUITS UNDER MANUFACTURING TOLERANCES

Authors
GIELEN G WANG Z SANSEN W
Citation
G. Gielen et al., OPTIMAL FAULT-DETECTION FOR ANALOG CIRCUITS UNDER MANUFACTURING TOLERANCES, Electronics Letters, 32(1), 1996, pp. 33-34
Citations number
2
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
32
Issue
1
Year of publication
1996
Pages
33 - 34
Database
ISI
SICI code
0013-5194(1996)32:1<33:OFFACU>2.0.ZU;2-2
Abstract
An optimal method for analogue fault detection is presented. Instead o f using arbitrary decision windows, the method fully considers the VLS I manufacturing tolerances and mismatches to minimise the probability of erroneous test decision. A-priori simulated probability information is combined with the actual measurement data to decide whether the ci rcuit is fault-free or faulty. Experimental results show the effective ness of the proposed technique.